Alif Semiconductor /AE722F80F55D5AS_CM55_HP_View /SDMMC /SDMMC_HOST_CTRL1_R

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Interpret as SDMMC_HOST_CTRL1_R

7 43 0 0 00 0 0 0 0 0 0 0 0 (Val_0x0)LED_CTRL 0 (Val_0x0)DAT_XFER_WIDTH 0DMA_SEL 0 (Val_0x0)EXT_DAT_XFER 0 (Val_0x0)CARD_DETECT_TEST_LVL 0 (Val_0x0)CARD_DETECT_SIG_SEL

LED_CTRL=Val_0x0, EXT_DAT_XFER=Val_0x0, CARD_DETECT_SIG_SEL=Val_0x0, DAT_XFER_WIDTH=Val_0x0, CARD_DETECT_TEST_LVL=Val_0x0

Description

Host Control 1 Register

Fields

LED_CTRL

LED Control. This bit is used to caution not to remove the card while the SD card is being accessed. The value is reflected on the led control signal.

0 (Val_0x0): LED off

1 (Val_0x1): LED on

DAT_XFER_WIDTH

Data Transfer Width. For both SD or eMMC modes, this bit selects the data transfer width of the Host Controller. The Host Driver sets it to match the data width of the SD or eMMC card.

0 (Val_0x0): 1-bit mode

1 (Val_0x1): 4-bit mode

DMA_SEL

DMA Select. This field is used to select the DMA type. When the SDMMC_HOST_CTRL2_R[HOST_VER4_ENABLE] bit is set to 0x1: 0x0: SDMA is selected 0x1: Reserved 0x2: ADMA2 is selected 0x3: ADMA2 or ADMA3 is selected When the SDMMC_HOST_CTRL2_R[HOST_VER4_ENABLE] bit is set to 0x0: 0x0: SDMA is selected 0x1: Reserved 0x2: 32-bit Address ADMA2 is selected 0x3: 64-bit Address ADMA2 is selected

EXT_DAT_XFER

Extended Data Transfer Width. This bit controls 8-bit bus width mode of embedded device.

0 (Val_0x0): Bus width is selected by the SDMMC_HOST_CTRL1_R [DAT_XFER_WIDTH] bit

1 (Val_0x1): 8-bit bus width

CARD_DETECT_TEST_LVL

Card Detect Test Level. This bit is enabled while the SDMMC_HOST_CTRL1_R[CARD_DETECT_SIG_SEL] bit is set to 0x1 and it indicates whether a card inserted or not.

0 (Val_0x0): No card

1 (Val_0x1): Card inserted

CARD_DETECT_SIG_SEL

Card Detect Signal Selection. This bit selects a source for card detection. When the source for the card detection is switched, the interrupt must be disabled during the switching period.

0 (Val_0x0): Card detect signal is selected (for normal use)

1 (Val_0x1): Card detect test level is selected (for test purpose)

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